Method for the manufacturing of a semiconductor device which comprises at least one chip and corresponding device

ABSTRACT

The semiconductor device comprises at least one chip arranged on a support. The chip is coated with an electrically insulating and heat-stable material. This electrically insulating and heat-stable material is penetrated by electrical-connection leads connecting sites of the chip to metallized contacts, and leads are substantially perpendicular both to the said sites and to the said metallized contacts.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a process for the fabrication of asemiconductor device which includes at least one chip, and to thecorresponding device.

2. Discussion of the Background

Known processes for manufacturing semiconductor devices may beclassified into three categories:

a) individual processes commonly called “die bonding” for sequentialelectrical connection by the bonding of metal leads, made of gold oraluminium, between a chip and electrical connection pins.

After making the electrical connections via metal leads, the chiparranged on a support is encapsulated in a plastic, or this support isfilled up in order to obtain hermeticity.

However, devices obtained by these industrially reliable processes havethe drawback of occupying a large area and a volume more than ten timesgreater than that of the chip which the device includes;

b) processes of mass-production manufacture using a tape transfertechnique (“TAB” or “tape automated bonding”), such as are extensivelydescribed in the article “TAB Implementation and Trends”, by PaulHOFFMANN—Mesa Technology, Mountain View, Calif.—pages 85 to 88 of thejournal “Solid State Technology” of June 1988.

The tenor of this article is deemed to be incorporated into the presentdescription.

These processes, the productivity of which is greater than that of theindividual processes, advantageously allow the chips to be tested beforethe final assembly, but they have the drawback of requiring a specialtreatment of the silicon wafers and also of occupying a large area;

c) processes for electrical connection between a chip and connectionpins, by the melting of metal microballs: these processes, known by thename of “flip chip” have the drawback of requiring a special treatmentof the silicon wafers, and are difficult to implement reliably when theconnection support and the chip have different thermal expansioncoefficients. Inspection of the corresponding bonded joints iscomplicated and difficult to carry out.

In addition, the corresponding manufacturing equipments are specific andnot widely available; the cost of this type of equipment leads to a highcost of the semiconductor devices fabricated by this process.

SUMMARY OF THE INVENTION

The aim of the invention is to create a new fabrication method capableof being implemented by means of existing manufacturing equipments, soas to produce devices which have a minimum size, which can be easilytested and inspected visually, and which can be inserted into electronicdevices where the reduction in size is paramount, like pacemakers, forexample.

The object of the invention is a method for the fabrication of asemiconductor device.

According to other features of the invention:

after a step of coating with heat-stable and electrically insulatingmaterial and before a metallization step, a V-shaped groove is scribedon an electrically insulating and heat-stable material at a site oftracks for cutting off chips;

the coating with electrically insulating and heat-stable material isperformed so as to define pads at the location of the metal leads.

According to other features of the invention:

metallized contacts are located at locations corresponding to projectingpads on a face of the device;

the metallized contacts include a sloping side facilitating visualinspection;

the chip forms the support of the device;

the support of the device is a multilayer circuit which includesmetallizations;

the multilayer support is connected to at least one chip, and thesupport is coated, at least on a side facing the chip, with a thicknessof electrically insulating and heat-stable material corresponding to theelectrical insulation of the support, the electrically insulating andheat-stable material being penetrated by at least one metal connectionlead;

the device includes at least one resistor deposited at an interfacebetween two adjacent layers.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be better understood by virtue of the followingdescription, given by way of non-limiting example with regard to theappended drawings in which:

FIG. 1 represents diagrammatically a plan view of a silicon wafer orsubstrate according to the invention;

FIG. 2 represents diagrammatically a side view in the direction of thearrow II of FIG. 1 of a wafer according to the invention;

FIG. 3 represents diagrammatically an enlarged partial plan viewaccording to the indicator III of FIG. 1;

FIG. 4 represents diagrammatically a partial cross-sectional viewaccording to the line IV—IV of the figure;

FIGS. 5 and 6 represent diagrammatically enlarged partial viewsrespectively according to the indicators V and VI of FIG. 4;

FIGS. 7, 8 and 9 represent diagrammatically views respectively similarto FIGS. 4, 5 and 6 of another embodiment of the invention;

FIG. 10 represents diagrammatically a cross-sectional view similar toFIGS. 4 and 7 of a third embodiment of the invention;

FIGS. 11 and 12 represent diagrammatically a perspective view and apartial cross-sectional section of a fourth embodiment of the invention;

FIGS. 13A and 13B represent diagrammatically, in cross-section, twoother alternative embodiments of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIGS. 1 and 2, a set of chips 2 have been produced on asubstrate 1, for example a single-crystal silicon substrate, by means ofknown techniques of photolithography and deposition of successivelayers.

An electrically insulating and preferably heat-stable material 3 hasbeen deposited onto the substrate 1, on at least one face, with athickness capable of ensuring the electrical insulation between thesubstrate and metallized contacts 4 on the surface of the heat-stablematerial.

The heat-stable materials which can be used for this purpose arematerials having properties similar to those of polyimides, for examplepolyimides, polyphenylquinoxalines, polysiloxanes, epoxy resins or thelike. These materials are preferably deposited by coating or anequivalent process; their thickness is then adjusted, for example bypolishing or grinding to a value lying between 0.05 mm and several mm.

Preferably, when the substrate 1 has a small thickness, the heat-stablematerial 3 will be deposited onto both substrate faces with thicknesses(of the order of 0.5 mm, for example) sufficient to prevent buckling ofthe substrate and to maintain good planarity, good parallelism and agood surface finish of the outer faces.

In the example of FIGS. 3 to 6, the process according to the inventionincludes the following steps:

producing a set of chips 2 on a substrate 1 by known treatmentoperations so as to constitute connection sites 5 (of square shape, forexample) on an accessible surface of the chips 2 of the substrate 1;

carrying out a sequential electrical inspection (“test”) of the chips 2produced;

carrying out a visual inspection, by means of known apparatuses, of thechips 2 produced;

making a connection to the chip 2 of ends of metal leads 6 at the siteof connection squares 5 by ultrasonically melting means, and bonding byflattening the end drop 7 on a corresponding metallized square 5.

This step is similar to the hard-wiring of on-chip metal leads, known as“Bonded Interconnect Pin” (or “BIP”, BIP being a registered trademark),described in the article “Next Generation Technologies” extracted fromthe work “High performance packaging solutions”, pages 10-6 to 10-8,published in 1991 by “Integrated Circuit Engineering Corporation”, ISBN1-87 77 50-10-7. The tenor of this article is deemed to be incorporatedinto the present description.

getting the correct length of the metal leads 6 by cutting to a lengthof one or more mm, the cut leads standing up substantiallyperpendicularly at the sites 5 of the chips 2;

coating at least that face of the substrate 1 bearing the metal leads 6with a heat-stable material 3 of the polyimide-resin or epoxy-resinkind;

finish-grinding at least the aforementioned face (bearing the metalleads 6) preferably by grinding or polishing to the desired thickness ofresin 3, greater than 0.05 mm, so as to obtain good planarity and goodparallelism of the faces;

scribing substantially V-shaped grooves 7 on the resin 3 along tracksfor cutting off the chips 2, the depth of the grooves 7 preferably beingless than half the thickness of finish-ground resin 3;

carrying out, in a known manner, a metallization on at least the facefrom which the ends of the metal leads 6 emerge, by a known process ofphotolithography, so as to connect the metal leads 6 to metallizedelectrical-connection contacts 4.

This metallization step may be carried out by the sputtering orelectroplating of a metal coating containing one or more elements of thecopper (Cu), nickel (Ni), gold (Au) or similar type, with a thicknesspreferably lying between 5 microns and 150 microns.

carrying out a test of the chips 2 by means of the metallized contacts4;

cutting along the cutting-off tracks at the bottom of the grooves 7, soas to obtain individual chips 2.

By virtue of the method according to the invention, sloping sides 9 areobtained after metallization which are capable of being visuallyinspected even after fixing of the chip according to the invention on acircuit.

The sloping sides 9 forming part of the metallized contacts 4 preferablyhave a width comparable to the width of the flat faces 8 of the contacts4 and are inclined with respect to these at an angle A lying between 30°and 60°, preferably on the order of 45°.

In some applications, provision is made to protect the cut edge 10 ofthe chip 2 with a coating 11, represented only in FIG. 5, on insulatingand chemically neutral material, of the silica type or similarinsulating resin, such as preferably a polyimide capable of beingdeposited by photolithography (that is, “photoimageable”), or simply bydipping into a liquid-resin bath after protecting at least the facebearing the metallized contacts 4.

Referring to FIGS. 7 to 9, a chip is produced in a similar manner to thechip 2 of FIGS. 4 to 5 and includes coatings of material 13, contacts 14connected at sites 15 by means of metal leads 16 terminated by flatteneddrops 17.

Preferably, the area of a site 15 is greater than 1600 square microns(40 μm×40 μm) and the cross-section of a lead 16 is of the order of 400square microns.

In this second embodiment, the metallized contacts 14 are deposited overpart of the flat 18 and sloping 19 outer surfaces of individual pads 20made of resin or a similar heat-stable material. The pads 20 remainafter mechanical finish-grinding or photolithographic deposition at thedesired locations: these pads 20 have the advantage of allowing cleaningbeneath that face of the chip 12 which is electrically connected to acircuit and is attached to a support.

Referring to FIG. 10, a device 30 includes a coating 31 forming a heatsink, for example a metal coating, fixed to an integrated circuit 32forming a substrate and coated with a heat-stable and electricallyinsulating material 33.

The coating material 33 is penetrated by electrically conducting leads(made of gold or aluminium, for example) for connection to metallizedelectrical-connection surfaces 34: the aforementioned leads aresubstantially perpendicular to the metallized surfaces 34.

Referring to FIGS. 11 and 12, a chip 35 forming a substrate is coated onthe non-active face with a material 36 of the polyimide kind.

The opposite face of the chip 35 is connected by means of electricallyconducting leads 38, through a coating 37, to metallized surfaces 39,40, 41, 42, 43. The leads 38 are substantially perpendicular both to theface of the chip 35 and to the metallized surfaces 39 to 43.

A passive component, which includes two metallized opposite ends 44, issoldered or adhesively bonded by means of an electrically conductiveadhesive to the substantially retangular surfaces 41.

A connection pin 45, preferably a metal pin, is attached to themetallized surface 43 in a similar manner.

Referring to FIGS. 13A and 13B, multiple-layer devices, which includechips 46 attached to at least one multilayer support 47, are produced ona single face (FIG. 13A) or on both faces (FIG. 13B).

The multilayer support 47 is a support of known type, for example madeof silicon (Si), ceramic (thin films having an alumina (Al₂O₃)percentage content lying between 96 and 99.5%), silicon carbide,aluminium nitride, co-fired high-temperature ceramic, co-firedlow-temperature ceramic, glass or 55%-alumina glassy ceramic.

This support 47, possibly connected to connection pins 48, is coated onat least one face with a heat-stable material 49.

The heat-stable material 49 is penetrated by metal leads 50 (made ofgold or aluminium, for example) for connection to other chips 46 and/orsurface-mounted components 51, 52, 53, 54, 55, 56, 57, 58.

The electronic components 51 to 58 are active or passive componentswhich preferably include metallized ends capable of being electricallyconnected to the metallized surfaces 59 of the outer faces.

Advantageously, provision is made to deposit resistors 60 of known type(for example screen-printed or electroplated resistors) onto themultilayer support or between two layers, which ensures maximumcompactness of the devices according to the invention and a sectioncorresponding to the section of the support 47.

What is claimed is:
 1. A semiconductor device comprising: at least onechip having at least one connecting site; a first electricallyinsulating material directly coating a surface of the at least one chip;at least one electrical connection lead penetrating the firstelectrically insulating material to contact the at least one connectingsite of the at least one chip and to connect the at least one connectingsite of the at least one chip to a metallized contact formed on anoutside surface of said first electrically insulating material, whereinthe at least one electrical connection lead is substantiallyperpendicular to both the at least one connection site of the at leastone chip and the metallized contact; and wherein the metallized contactincludes a sloping side for facilitating visual inspection.
 2. Thesemiconductor device according to claim 1, wherein the firstelectrically insulating material is heat-stable.
 3. The semiconductordevice according to claim 1, wherein the metallized contact is locatedat a location corresponding to a projecting pad.
 4. The semiconductordevice according to claim 1, further comprising a multilayer circuitincluding metallizations, wherein the multilayer circuit is connected tothe at least one chip and is coated on at least one side facing the atleast one chip with a second electrically insulating material which ispenetrated by at least one metal connection lead.
 5. The semiconductordevice according to claim 1, wherein the at least one chip forms a firstsupport for the semiconductor device.
 6. The semiconductor deviceaccording to claim 5, further comprising a second support constituted bya multilayer circuit which includes metallizations.
 7. A semiconductordevice having at least one chip including at least one connecting site,comprising: a first electrically insulating means directly coating asurface of the at least one chip; at least one electrical connectionmeans penetrating the first electrically insulating means to contact theat least one connecting site of the at least one chip and to connect theat least one connecting site of the at least one chip to a metallizedcontact means formed on an outside surface of said first electricallyinsulating means, wherein the at least one electrical connection lead issubstantially perpendicular to both the at least one connection site ofthe at least one chip and the metallized contact means.
 8. Thesemiconductor device according to claim 7, wherein the firstelectrically insulating means is a heat-stable material.
 9. Thesemiconductor device according to claim 7, wherein the firstelectrically insulating means is a heat-stable material.
 10. Thesemiconductor device according to claim 7, wherein the metallizedcontact means includes a sloping side for facilitating visualinspection.
 11. The semiconductor device according to claim 7, furthercomprising a multilayer circuit means including metallizations, whereinthe multilayer circuit means is connected to at least one chip and iscoated on at least one side facing the at least one chip with a secondelectrically insulating means which is penetrated by at least one metalconnection lead.
 12. The semiconductor device according to claim 7,wherein the at least one chip forms a first support means for thesemiconductor device.
 13. The semiconductor device according to claim12, further comprising a second support means constituted by amultilayer circuit which includes metallizations.
 14. The semiconductordevice according to claim 4, wherein the multilayer circuit furtherincludes a resistor formed between two adjacent layers of the multilayercircuit.
 15. The semiconductor device according to claim 7, wherein themultilayer circuit includes a resistor formed between two adjacentlayers of the multilayer circuit.